Home > Publication

(Only peer-reviewed papers and posters in English)


2024

  • Masahiro Nakao, Koji Ueno, Katsuki Fujisawa, Yuetsu Kodama, Mitsuhisa Sato. ``Graph500 benchmark with automatic performance tuning'', The International Conference on High Performance Computing in Asia-Pacific Region (HPC Asia), Aichi, Japan, Jan. 2024.

2023

  • Masahiro Nakao, Hidetomo Kaneyama, Masaru Nagaku, Ikki Fujiwara, Atsuko Takefusa, Shin'ichi Miura, Keiji Yamamoto. ``Introducing Open OnDemand to Supercomputer Fugaku'', 10th International Workshop on HPC User Support Tools (HUST2023), Denver, USA, Nov. 2023. doi: 10.1145/3624062.3624150 [slide]
  • Masahiro Nakao, Shin'ichi Miura, Keiji Yamamoto. ``Introduction of Open OnDemand to Supercomputer Fugaku'', HPC Asia 2023, Singapore, Mar. 2023.
  • Mitsuhisa Sato, Miwako Tsuji. ``OpenACC Execution Models for Manycore Processor with ARM SVE'', 2nd International workshop on Arm-based HPC: Practice and Experience (IWAHPCE 2023), Feb. 2023.

2022

  • Yutaka Watanabe, Mitsuhisa Sato, Miwako Tsuji, Hitoshi Murai, Taisuke Boku. ``Design and Performance Evaluation of UCX for Tofu-D Interconnect with OpenSHMEM-UCX on Fugaku'', 2022 IEEE/ACM Parallel Applications Workshop: Alternatives To MPI+X (PAW-ATM), Dallas, TX, USA, Nov. 2022. doi: 10.1109/PAW-ATM56565.2022.00010
  • Masahiro Nakao, Masaki Tsukamoto, Yoshiko Hanada, Keiji Yamamoto. ``Graph optimization algorithm using symmetry and host bias for low-latency indirect network'', Parallel Computing, Oct. 2022. doi:10.1016/j.parco.2022.102983
  • Yuetsu Kodama, Masaaki Kondo, Mitsuhisa Sato. ``Evaluation of Performance and Power Consumption on Supercomputer Fugaku using SPEC HPC benchmarks'', IEICE Transactions on Electronics, 2022. doi: 10.1587/transele.2022LHP0001
  • Miwako Tsuji, Mitsuhisa Sato. ``Performance analysis of a state vector quantum circuit simulation on A64FX processor'', Embracing Arm for HPC, Oct. 2022. doi: 10.1109/CLUSTER51413.2022.00074
  • Masahiro Nakao, Masaki Tsukamoto, Yoshiko Hanada, Keiji Yamamoto. ``Graph optimization algorithm for low-latency indirect network'', HPC Asia 2022, Online, Jan. 2022.

2021

  • Masahiro Nakao, Maaki Sakai, Yoshiko Hanada, Hitoshi Murai, Mitsuhisa Sato. ``Graph optimization algorithm for low-latency interconnection networks'', Parallel Computing, Jul. 2021. doi:10.1016/j.parco.2021.102805
  • Masahiro Nakao, Koji Ueno, Katsuki Fujisawa, Yuetsu Kodama, Mitsuhisa Sato. ``Performance of the Supercomputer Fugaku for Breadth-First Search in Graph500 Benchmark.'' ISC 2021, Jun. 2021. doi:10.1007/978-3-030-78713-4_20 [slide]
  • Miwako Tsuji, William T.C. Kramer, Jean-Christophe Weill, Jean-Philippe Nominé, Mitsuhisa Sato, ``A new sustained system performance metric for scientific performance evaluation.'' The Journal of Supercomputing, Springer, Jan. 2021. doi:10.1007/s11227-020-03545-y

2020

  • Tetsuya Odajima, Yuetsu Kodama, Mitsuhisa Sato. ``Performance and power consumption analysis of Arm Scalable Vector Extension.'' The Journal of Supercomputing, Nov. 2020. doi:10.1007/s11227-020-03495-5
  • Mitsuhisa Sato, Yutaka Ishikawa, Hirofumi Tomita, Yuetsu Kodama, Tetsuya Odajima, Miwako Tsuji, Hisashi Yashiro, Masaki Aoki, Naoyuki Shida, Ikuo Miyoshi, Kouichi Hirai, Atsushi Furuya, Akira Asato, Kuniki Morita. ``Co-Design for A64FX Manycore Processor and "Fugaku",'' International Conference for High Performance Computing, Networking, Storage and Analysis, Vol. 1, pp. 651-665, Nov. 2020. doi:10.1109/SC41405.2020.00051
  • Tetsuya Odajima, Yuetsu Kodama, Miwako Tsuji, Motohiko Matsuda, Yutaka Maruyama, Mitsuhisa Sato. ``Preliminary Performance Evaluation of the Fujitsu A64FX Using HPC Applications,'' Embracing Arm: a journey of porting and optimization to the latest Arm-based processors (EAHPC-2020), Online, Sep. 2020.
  • Yuetsu Kodama, Tetsuya Odajima, Eishi Arima, Mitsuhisa Sato. ``Evaluation of Power Controls on Supercomputer Fugaku,'' Energy Efficient HPC State of the Practice Workshop, Online, Sep. 2020.
  • Masahiro Nakao, Koji Ueno, Katsuki Fujisawa, Yuetsu Kodama, Mitsuhisa Sato. ``Performance Evaluation of Supercomputer Fugaku using Breadth-First Search Benchmark in Graph500,'' IEEE Cluster 2020 (Poster), Online, Sep. 2020. [Poster 1, 2]
  • Hitoshi Murai, Mitsuhisa Sato. ``Design and evaluation of efficient global data movement in partitioned global address space,'' Parallel Computing, Apr. 2020. doi:10.1016/j.parco.2020.102624
  • Yuetsu Kodama, Tetsuya Odajima, Akira Asato, Mitsuhisa Sato. ``Accuracy Improvement of Memory System Simulation for Modern Shared Memory Processor,'' HPC Asia 2020, Fukuoka, Japan, Jan. 2020.
  • Masahiro Nakao, Hitoshi Murai, Mitsuhisa Sato. ``Parallelization of All-Pairs-Shortest-Path Algorithms in Unweighted Graphs,'' HPC Asia 2020, Fukuoka, Japan, Jan. 2020. [slide]

2019

  • Yuetsu Kodama, Tetsuya Odajima, Mitsuhisa Sato. ``RIKEN Fugaku Processor Simulator and its Accuracy for Cache and Memory Throughput,'' Arm Research Summit 2019, Austin, USA, Sep. 2019.
  • Jinpil Lee, Yutaka Watanabe, Mitsuhisa Sato. ``OpenMP Task Generation for Batched Kernel APIs,'' 15th International Workshop on OpenMP, Auckland, New Zealand, Sep. 2019.
  • Masahiro Nakao, Hitoshi Murai, Mitsuhisa Sato, Yoshimichi Andoh, Susumu Okazaki. ``Performance improvement of MODYLAS using Remote Direct Memory Access on the K computer,'' International Conference on Parallel Processing (ICPP) 2019 Poster, Kyoto, Japan, Aug. 2019. [poster]
  • Masahiro Nakao, Hitoshi Murai, Mitsuhisa Sato. ``A Method for Order/Degree Problem Based on Graph Symmetry and Simulated Annealing with MPI/OpenMP Parallelization,'' HPC Asia 2019, Guangzhou, China, Jan. 2019. [slide]
  • Miwako Tsuji, Taisuke Boku, Mitsuhisa Sato. ``Scalable communication performance prediction using auto-generated pseudo MPI event trace,'' HPC Asia 2019, Guangzhou, China, Jan. 2019.
  • Masahiro Nakao, Hitoshi Murai, Mitsuhisa Sato. ``Multi-accelerator extension in OpenMP based on PGAS model,'' HPC Asia 2019, Guangzhou, China, Jan. 2019. [slide]
  • Masahiro Nakao, Tetsuya Odajima, Hitoshi Murai, Akihiro Tabuchi, Norihisa Fujita, Toshihiro Hanawa, Taisuke Boku, Mitsuhisa Sato. ``Evaluation of XcalableACC with Tightly Coupled Accelerators/InfiniBand Hybrid Communication on Accelerated Cluster,'' International Journal of High Performance Computing Applications, Jan. 2019. doi:10.1177/1094342018821163.

2018

  • Hitoshi Murai, Mitsuhisa Sato, Masahiro Nakao, Jinpil Lee. ``Metaprogramming Framework for HPC based on the Omni Compiler Infrastructure,'' 6th International Workshop on Large-scale HPC Application Modernization, Gifu, Japan, Nov. 2018.
  • Tetsuya Odajima, Yuetsu Kodama, Mitsuhisa Sato. ``Performance and Power Consumption Analysis of ARM Scalable Vector Extension,'' Arm Research Summit 2018, Cambridge, UK, Sep. 2018.
  • Tetsuya Odajima, Yuetsu Kodama, Miwako Tsuji, Mitsuhisa Sato. ``Performance and Power Consumption Analysis of ARM Scalable Vector Extension by using Gem5 Processor Simulator,'' ModSim 2018, Seattle, WA, USA, Aug. 2018.
  • Jinpil Lee, Tomohiro Ueno, Mitsuhisa Sato, Kentaro Sano. ``High-productivity Programming and Optimization Framework for Stream Processing on FPGA,'' HEART 2018, Toronto, Canada, Jun. 2018.
  • Tetsuya Odajima, Yuetsu Kodama, Mitsuhisa Sato. ``Power Performance Analysis of ARM Scalable Vector Extension,'' COOL Chips 21, Kanagawa, Japan, Apr. 2018.
  • Masahiro Nakao, Hitoshi Murai, Taisuke Boku, Mitsuhisa Sato. ``Linkage of XcalableMP and Python languages for high productivity on HPC cluster system,'' Workshop on PGAS programming models: Experiences and Implementations, Tokyo, Japan, Jan. 2018. [slide]
  • Hidetoshi Iwashita, Masahiro Nakao, Hitoshi Murai, Mitsuhisa Sato. ``A Source-to-Source Translation of Coarray Fortran with MPI for High Performance,'' HPC Asia 2018, Tokyo, Japan, Jan. 2018.
  • Masahiro Nakao, Hitoshi Murai, Taisuke Boku, Mitsuhisa Sato. ``Performance Evaluation for Omni XcalableMP Compiler on Many-core Cluster System based on Knights Landing,'' IXPUG Workshop Asia 2018, Tokyo, Japan, Jan. 2018. [slide]
  • Miwako Tsuji, Mitsuhisa Sato. ``An extension of the fault tolerant multi-SPMD programming environment for large scale systems and MPI-IO,'' HPC Asia 2018 Poster, Tokyo, Japan, Jan. 2018.
  • Masahiro Nakao, Hitoshi Murai, Akihiro Tabuchi, Taisuke Boku, Mitsuhisa Sato. ``Performance Evaluation of NICAM-DC-MINI using XcalableACC on Accelerated Cluster,'' HPC Asia 2018 Poster, Tokyo, Japan, Jan. 2018.

2017

  • Hitoshi Murai, Masahiro Nakao, Hidetoshi Iwashita, Mitsuhisa Sato. ``Preliminary Performance Evaluation of Coarray-based Implementation of Fiber Miniapp Suite using XcalableMP PGAS Language,'' Second Annual PGAS Applications Workshop (PAW), CO, USA, Nov. 2017.
  • Masahiro Nakao, Hitoshi Murai, Hidetoshi Iwashita, Akihiro Tabuchi, Taisuke Boku, Mitsuhisa Sato. ``Implementing Lattice QCD Application with XcalableACC Language on Accelerated Cluster,'' IEEE Cluster 2017, HI, USA, Sep. 2017. [slide]
  • Yuetsu Kodama, Tetsuya Odajima, Motohiko Matsuda, Miwako Tsuji, Jinpil Lee, Mitsuhisa Sato. ``Preliminary Performance Evaluation of Application Kernels using ARM SVE with Multiple Vector Lengths,'' Re-Emergence of Vector Architectures Workshop (Rev-A), HI, USA, Sep. 2017.
  • Miwako Tsuji, William Kramer, Mitsuhisa Sato. ``A Performance Projection of mini-Applications onto Benchmarks toward the Performance Projection of real-Applications,'' Workshop on Representative Applications (WRAp), HI, USA, Sep. 2017.
  • Jinpil Lee, Francesco Petrogalli, Graham Hunter, Mitsuhisa Sato. ``Extending OpenMP SIMD support for target specific code and application to ARM SVE,'' 13th International Workshop on OpenMP, NY, USA, Sep. 2017.
  • Masahiro Nakao, Hitoshi Murai, Hidetoshi Iwashita, Taisuke Boku, Mitsuhisa Sato. ``Implementation and evaluation of the HPC Challenge benchmark in the XcalableMP PGAS language,'' International Journal of High Performance Computing Applications, 33(1), 110–123. Mar. 2017. doi:10.1177/1094342017698214.

2016

  • Jinpil Lee, Keisuke Tsugane, Hitoshi Murai, Mitsuhisa Sato. ``OpenMP Extension for Explicit Task Allocation on NUMA Architecture, '' 12th International Workshop on OpenMP, Nara, Japan, Oct. 2016.
  • Hitoshi Murai, Taisuke Boku, Matthias S. Müller, Christian Terboven, Joachim Protze, Pablo Reble, Serge G. Petiton, Nahid Emad. ``MYX: MUST Correctness Checking for YML & XMP Programs,'' ISC16/HPCAsia Poster, Frankfurt, Germany, Jun. 2016. [detail]
  • Miwako Tsuji, Jinpil Lee, Taisuke Boku, Mitsuhisa Sato. ``SCAMP: A "Pseudo"-Trace Driven Simulation toward Scalable Network Evaluation,'' ISC16/HPCAsia Poster, Frankfurt, Germany, Jun. 2016. [detail]
  • Jinpil Lee, Tsugane Keisuke, Daisuke Sugiyama, Murai Hitoshi, Mitsuhisa Sato. ``XMP-Tasklet: Multitasking in a PGAS Language for Many-Core Clusters,'' ISC16/HPCAsia Poster, Frankfurt, Germany, Jun. 2016. [detail]
  • Mitsuhisa Sato, Hitoshi Murai, Masahiro Nakao, Hidetoshi Iwashita, Jinpil Lee, Akihiro Tabuchi. ``Omni Compiler and XcodeML: An Infrastructure for Source-to-Source Transformation,'' Platform for Advanced Scientific Computing Conference (PASC16), Lausanne, Switzerland, Jun. 2016. [slide]

2015

  • Miwako Tsuji, Mitsuhisa Sato. ``Fault Tolerance Features of a New Multi-SPMD Programming/Execution Environment, '' Proceedings of First International Workshop on Extreme Scale Programming Models and Middleware, Texas, USA, Nov. 2015. doi:10.1145/2832241.2832243
  • Hidetoshi Iwashita, Masahiro Nakao, Mitsuhisa Sato. ``Preliminary Implementation of Coarray Fortran Translator Based on Omni XcalableMP,'' The 9th International Conference on Partitioned Global Address Space Programming Models (PGAS2015), Washington, D.C. USA, Sep. 2015. doi:10.1109/PGAS.2015.15
  • Miwako Tsuji. ``K-scale applications on the K computer and co-design effort for the design and development of post-K,'' International Conference on Parallel Computing (ParCo), Edinburgh, Scotland, UK, Sep. 2015.

2014

  • Masahiro Nakao, Hitoshi Murai, Takenori Shimosaka, Akihiro Tabuchi, Toshihiro Hanawa, Yuetsu Kodama, Taisuke Boku, Mitsuhisa Sato. ``XcalableACC: Extension of XcalableMP PGAS Language using OpenACC for Accelerator Clusters,'' Workshop on accelerator programming using directives (WACCPD), New Orleans, LA, USA, Nov. 2014. doi:10.1109/WACCPD.2014.6 [slide]
  • Hitoshi Murai, Masahiro Nakao, Takenori Shimosaka, Akihiro Tabuchi, Taisuke Boku, Mitsuhisa Sato. ``XcalableACC - a Directive-based Language Extension for Accelerated Parallel Computing,'' SC14 poster, New Orleans, LA, USA, Nov. 2014. [abstract] [poster]
  • Swann Perarnau, Mitsuhisa Sato. ``Victim Selection and Distributed Work Stealing Performance: A Case Study,'' In IEEE International Parallel and Distributed Processing Symposium (IPDPS), Phoenix, AZ, USA, May 2014. doi:10.1109/IPDPS.2014.74 [paper]

2013

  • Miwako Tsuji, Makarem Dandouna, Nahid Emad. ``Multi level parallelism of Multiple implicitly/explicitly restarted Arnoldi methods for post-petascale computing,'' Proceedings of the 8th International Conference on P2P Parallel Grid Cloud and Internet Computing (3PGCIC-2013), pp. 158--165, Compiegne, France, Oct. 2013. doi:10.1109/3PGCIC.2013.30
  • Miwako Tsuji, Mitsuhisa Sato, Maxime Hugues, Serge Petiton. ``Multiple-SPMD Programming Environment based on PGAS and Workflow toward Post-Petascale Computing,'' Proceedings of the 2013 International Conference on Parallel Processing (ICPP-2013), pp. 480--485, Lyon, France, Oct. 2013. doi:10.1109/ICPP.2013.58
  • Hitoshi Murai, Mitsuhisa Sato. ``An Efficient Implementation of Stencil Communication for the XcalableMP PGAS Parallel Programming Language,'' 7th International Conference on PGAS Programming Models, Edinburgh, Scotland, UK, Oct. 2013. [paper]
  • Masahiro Nakao, Hitoshi Murai, Takenori Shimosaka, Mitsuhisa Sato. ``Productivity and Performance of the HPC Challenge Benchmarks with the XcalableMP PGAS Language,'' 7th International Conference on PGAS Programming Models, Edinburgh, Scotland, UK, Oct. 2013. [paper] [slide]
  • Tomotake Nakamura, Mitsuhisa Sato. ``XMP-IO function and applying to MapReduce on the K computer,'' ParCo : International Conference on Parallel Computing, Munich, Germany, Sep. 2013. doi:10.3233/978-1-61499-381-0-35
  • Tatsuya Abe, Toshiyuki Maeda, Mitsuhisa Sato. ``Model Checking Stencil Computations Written in a Partitioned Global Address Space Language,'' Parallel and Distributed Processing Symposium Workshops & PhD Forum (IPDPSW), Boston, MA, USA, May 2013. doi:10.1109/IPDPSW.2013.90
  • Swann Perarnau, Mitsuhisa Sato. ``Discovering Sector Cache Optimizations on the K Computer,'' 2nd Asia-Pacific Programming Languages and Compilers Workshop (APPLC), ShenZhen, China, Feb. 2013. [paper] [slide]

2012

  • Tatsuya Abe, Toshiyuki Maeda, Mitsuhisa Sato. ``Model checking with user-definable abstraction for partitioned global address space languages,'' In Proceedings of the 6th Conference on Partitioned Global Address Space Programming Models (PGAS), Santa Barbara, Oct. 2012.
  • Tatsuya Abe, Mitsuhisa Sato. ``On-the-fly synchronization checking for interactive programming in XcalableMP,'' In Proceedings of the 5th International Workshop on Parallel Programming Models and Systems Software for High-End Computing (P2S2), pp. 29--37, Pittsburgh, PA, USA, Sep. 2012. doi:10.1109/ICPPW.2012.8
  • Tatsuya Abe, Mitsuhisa Sato. ``Auto-tuning of numerical programs by block multi-color ordering code generation and job-level parallel execution,'' In Proceedings of the 7th International Workshop on Automatic Performance Tuning (iWAPT), Kobe, Hyogo, Japan, Jul. 2012. doi:10.1007/978-3-642-38718-0_37